About the role
We're looking for an ML engineer who works across the full stack from model to silicon — comfortable optimizing training and inference performance on GPU/AI-accelerator infrastructure, building or tuning models, and adapting model and inference-engine design to the constraints of the underlying chip and its NPU. You'll move fluidly between algorithm work, systems-level software, and infrastructure work, closing the loop end-to-end rather than owning just one layer of the stack. This is a rare chance to work the full cycle of AI silicon, from model down to chip — something most ML engineers at large companies never get access to.
What you'll do
- Optimize training and inference performance across GPU and AI-accelerator infrastructure, including MLOps pipelines
- Design, train, and evaluate ML models (deep learning, LLM, CV, or recommendation systems) and take them into production
- Harden and extend NPU cores (e.g. building on an open RVV/tensor core like CoralNPU) into production silicon
- Build or optimize inference engines and serving runtimes against real hardware constraints — latency, memory, and power
- Work below the application layer where needed — BMC firmware, embedded Linux, or RTOS (e.g. Zephyr) — so AI features run reliably on real systems
- Build automated test/verification harnesses that close the loop for AI-assisted RTL/DV, hardware bring-up, or manufacturing test
- Apply ML to security — AI-driven log/intrusion analysis, AI-assisted penetration testing, or firmware/hardware security work
- Collaborate closely with RTL/hardware, firmware, and QA teams to ship AI features end-to-end, from training through deployment and monitoring
What we're looking for
- 5–7+ years of hands-on AI/ML experience; Master's required, PhD preferred
- Hands-on experience with AI/ML infrastructure and performance — GPU clusters, distributed training, inference-serving optimization, MLOps pipelines
- Model / algorithm development experience — designing, training, and evaluating ML models
- Experience taking models into production — feature engineering, data pipelines, deployment
- AI chip / hardware-aware ML experience — optimizing inference engines for a specific chip, or adapting model architecture/quantization to chip constraints
- Deep, hands-on expertise in at least 2 of the following 5 specialty areas — we don't expect all five:
– NPU / AI-accelerator — hardening or extending an NPU core into production silicon, mapping models onto MAC/tensor-engine constraints, or NPU-aware RTL/DV work
– Systems / Sys-level software — BMC firmware, embedded Linux, RTOS (e.g. Zephyr), or other low-level system software
– Inference engine / runtime — built or materially optimized an inference engine or serving runtime against real hardware constraints
– Test / verification harness — built an automated harness that closes a loop, e.g. an agent-driven RTL/DV test runner or a hardware bring-up / MFG test harness
– Cyber security — AI-driven log/intrusion analysis, AI-assisted penetration testing, or firmware/hardware security
Axiado is committed to attracting, developing, and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.
We are building an exceptional team to secure every node on the internet. For us, solving real-world problems takes precedence over purely theoretical problems. As a result, we prefer individuals with persistence, intelligence and high curiosity over pedigree alone. Working hard and smart, continuous learning and mutual support are all part of who we are.
Axiado is an Equal Opportunity Employer. Axiado does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications, merit, and business need.