Log inSign up free
  • Home
  • Profile
  • Jobs
    • Applications
    • Career
    • Resume
    • Cover letters
  • Content
    • Posts
    • Media
  • Messages
  • Analytics
    • Overview
    • Pages
  • Portfolio
  • More tools
    • Hiring
  • Settings
All jobs
VOVoltai logo

Voltai

Palo Alto Office

Emulation & FPGA Prototyping Engineer.

FULL TIMEENGINEERING

About Voltai

Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.

About the Team

Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), the inventors of IC3 and the Murphi verification system, CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.

About this Role

You'll bring designs to life before silicon exists. You'll own emulation and FPGA prototyping on real silicon programs with leading semiconductor companies while helping Voltai's AI learn to debug at system scale.

What You’ll Do

  • Build and maintain emulation and FPGA prototyping platforms for SoCs and subsystems.

  • Map designs onto emulators and FPGAs, including partitioning and timing closure.

  • Enable early software bring-up, system validation, and performance analysis.

  • Debug complex hardware/software issues at system scale.

  • Build automation for emulation compile, run, and triage.

  • Generate system-level data that helps train and evaluate Voltai's models.

What We’re Looking For

  • 5+ years of emulation or FPGA prototyping experience.

  • Hands-on experience with Palladium, ZeBu, Veloce, or HAPS.

  • Strong SystemVerilog and FPGA tooling (Vivado, Quartus) experience.

  • Experience with hardware/software co-verification and debug.

  • Python, Tcl, or C/C++ scripting.

Bonus Points

  • Experience with transactors and hybrid emulation.

  • Linux driver or firmware bring-up experience.

  • Interest in AI-assisted design tools.

Pay
Not stated
Where
Palo Alto Office
Work
Not stated
Type
Full time
Posted
19 Oct, 2026
Apply on the original postingSign in to apply

Verified board

more at Voltai.

19 Oct, 2026

Voltai

CAD & Flow Methodology Engineer

VOVoltai logo
  • Full time
  • Engineering

Palo Alto Office

Full time

Details
19 Oct, 2026

Voltai

Low-Power Design Engineer

VOVoltai logo
  • Full time
  • Engineering

Palo Alto Office

Full time

Details
19 Oct, 2026

Voltai

Physical Verification & Signoff Engineer

VOVoltai logo
  • Full time
  • Engineering

Palo Alto Office

Full time

Details

similar roles.

19 Oct, 2026

Aidoc

Engineering Team Lead

AIAidoc logo
  • Senior level
  • Engineering

Tel Aviv-Yafo +2

Salary not listed

Details
19 Oct, 2026

AlphaSense

Staff QE

ALAlphaSense logo
  • Remote
  • Engineering

Remote - United States

Remote

Details
19 Oct, 2026

robustagroup.com

Senior Full-Stack Developer - Remote - 3 Months Contract - Octopus by RTG

RCrobustagroup.com logo
  • Contract
  • Senior level
  • Remote
  • Engineering

Cairo +2

Remote

Details
19 Aug, 2026

Outset Medical

Field Service Engineer II (Seattle, WA)

OMOutset Medical logo
  • Middle level
  • Engineering

Seattle, WA

Salary not listed

Details
19 Oct, 2026

Osano

Senior Software Engineer, Full Stack

OSOsano logo
  • Senior level
  • Remote
  • Engineering

Remote

Remote

Details
19 Oct, 2026

Endurance Energy

Senior Harness Engineer

EEEndurance Energy logo
  • Full time
  • Senior level
  • Engineering

$150k–225k/yr

Seattle, WA

Details