Job Details: Job Description: Altera is seeking a skilled DFT Design Engineer to contribute to the design and implementation of Design-for-Test (DFT) solutions for complex integrated circuits, ensuring high test coverage and efficient manufacturing test. Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well as test content generation and delivery to manufacturing for various DFx content (including SCAN, MBIST, and BSCAN). Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed (including SCAN, MBIST). Applies various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to qualify the design to meet test-coverage, DPM, and test-time/vector-memory reduction goals as well as design integrity for physical implementation. Reviews the verification plan and drives verification of the DFT design to achieve desired architecture and microarchitecture specifications. Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Integrates DFT blocks into functional IP and SoC and supports SoC customers to ensure high-quality integration of the IP block. Collaborates with post-silicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation. Experiment in DFT for mix signal IP required. Qualifications: Minimum Bachelor's degree in Electronics Engineering. At least 4 years of experience in DFT. Strong experience in Scan Architecture, Scan Insertion, and ATPG execution. Experience defining and implementing scan procedures. Good experience with Mixed-Signal IP DFT. Hands-on experience with MBIST implementation and MBIST validation. Experience in RTL design, DFT integration, verification, and supporting DFT activities at IP/SoC level. Job Type: Regular Shift: Shift 1 (Israel) Primary Location: Jerusalem, Israel Additional Locations: TLV Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. About Altera Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet. Don't see the dream job you are looking for? Click "Get Started" below to drop off your contact information and resume and we will reach out to you if we find the perfect fit.

DFT Design Engineer.

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