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Cisco

TWN-TAIPEI, Taiwan

Hardware Engineer.

REMOTEENGINEERING
Meet the Team The System & Optics Group (SAO) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your Impact Hardware design engineer is a key member of the Cisco Purpose Built Switch hardware team. Define and design the next generation Hyperscaler Switch hardware based on Silicon One and/or merchant ASIC, as well as CPU subsystem. Responsible for system and board level specification, schematic capture, FPGA design, ASIC/System level bring up and troubleshooting. The individual is expected to bring up the system to work with multiple groups including ASIC, DFT, Signal Integrity, software, Diagnostics and Manufacturing team to resolve any design issues. Debug and troubleshoot in labs using scopes and analyzers Act as technical liaison with major component Suppliers for the product Minimum Qualifications Bachelor's degree in Electrical Engineering or Computer Engineering or Telecommunications and 7 years of experience, or Master’s degree with 5+ years Prior experience with common HW technology, including power, clock, memory, CPU, and variety of system interfaces. Previous experience with complex high-speed board design and board bring-up. Prior experience with schematics/layout, Hardware bring-up, trouble-shooting, system level testing. Experience with working with Software team on system bring-up and porting, devices configuration (registers level). Preferred Qualifications Experience with high speed Ethernet interfaces and optics in 25G, 100G, 400G, 800G, 1.6T Experience with x86 or ARM CPU development in Datacenter or Server/HPC Experience with schematics, PCB and Verilog HDL/VHDL design Experience with lab bring up and design validation of products Knowledge on the Ethernet protocol is a plus Experience with DRAM, CPU subcomplex and control interfaces such as PCIe, I2C, SPI, MDC/MDIO Self-motivation, teamwork and strong communication skills are essential. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Cisconians power the future. We make impact as a team, innovating fast and fearlessly to create meaningful solutions on a large scale. The depth and breadth of our technology doesn't just benefit our customers – it also means limitless opportunities for us to experiment and learn. We understand the power each of our unique backgrounds bring when we work together. Because of that, we have a global network of thinkers, doers, experts, and curious creators who help one another do their life’s best work.
Pay
Not stated
Where
TWN-TAIPEI, Taiwan
Work
Remote
Type
Not stated
Posted
20 Oct, 2026
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